annotate dxa.1 @ 14:84c0facfc43c

Merge changes from upstream v0.1.4.
author Matti Hamalainen <ccr@tnsp.org>
date Thu, 14 Oct 2021 01:38:52 +0300
parents 4410c9c7750d
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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84c0facfc43c Merge changes from upstream v0.1.4.
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1 .TH DXA "1" "31 January 2019"
0
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2
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3 .SH NAME
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4 dxa \- 6502/R65C02 disassembler
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5
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6 .SH SYNOPSIS
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7 .B dxa
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8 [\fIOPTION\fR]... \fIFILE\fR
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9
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10 .SH DESCRIPTION
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11 .B dxa
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12 is the semi-official disassembler option for the
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13 .BR xa (1)
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14 package, a weakly patched version of Marko Mäkelä's
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15 .B d65
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16 disassembler that generates output similar to the de facto coding
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17 conventions used for
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18 .BR xa (1).
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19 The package is designed to intelligently(?) scan arbitrary code and (with
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20 hints) can identify the difference between data and valid machine code,
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21 generating a sane looking, "perfect" disassembly with data and code portions.
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22 .LP
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23 Perfect, in this case, means that you can take what
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24 .B dxa
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25 spits out and feed it right back into
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26 .BR xa (1),
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27 and get the exact same object file you started with, even if sometimes
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28 .B dxa
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29 can't identify everything correctly. With a few extra options, you can tease
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30 and twist the output to generate something not quite so parseable, or even
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31 more like true assembler source.
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32 .SH OPTIONS
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33 For historical and compatibility reasons, the long options (--) only exist
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34 if
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35 .B dxa
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36 were compiled with LONG_OPTIONS enabled in options.h.
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37 .TP
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38 .B \--datablock xxxx-yyyy
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39 .TP
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40 .B \-b xxxx-yyyy
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41 Defines the memory range xxxx to yyyy (hexadecimal, inclusive) to be a data
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42 block. The memory range can be further specified:
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43 .RS
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44 .IP *
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45 If the range is preceded by ! (an exclamation point), such as
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46 .BR !c000-cfff ,
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47 then it is
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48 further defined to be a data block with no vectors in it either.
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49 .IP *
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50 If the range is preceded by ? (a question mark), then it is further
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51 defined to be a data block that is completely unused and therefore
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52 no valid routine may contain instructions whose parameter lie in this
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53 range. Useful for providing enhanced protection against misinterpreting
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54 data to be program code, but be careful, or some code may be listed as
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55 data. For instance, the Commodore 64 firmware uses the base address $CFFF
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56 when initializing the video chip, and the BASIC interpreter uses the
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57 addresses $9FEA and $9FEB while loading the instruction pointers.
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58 In addition to this, there are a number of BIT instructions used for
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59 skipping the next instruction. Thus, you must allow addresses like $1A9,
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60 $2A9 and so on.
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61 .RE
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62 .TP
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63 .B \--datablocks filename
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64 .TP
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65 .B \-B filename
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66 Reads data blocks from file
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67 .B filename
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68 as if they had been specified on the command
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69 line, one per line (such as xxxx-yyyy, ?xxxx-yyyy, etc.).
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70 .TP
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71 .B \--labels filename
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72 .TP
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73 .B \-l filename
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74 Causes label names to be read from file
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75 .BR filename .
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76 This file format is the same as the labelfile/symbol table file generated
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77 by
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78 .BR xa (1)
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79 with the
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80 .B \-l
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81 option. The
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82 .B \-l
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83 was chosen on purpose for consistency with
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84 .BR xa (1).
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85 .TP
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86 .B \--routine xxxx
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87 .TP
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88 .B \-r xxxx
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89 Specifies an address (in hexadecimal) that is declared to be a valid routine.
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90 .B It is strongly recommended
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91 that you specify the initial execution address as a routine.
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92 For example, for a Commodore 64 binary with a BASIC header that performs
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93 .B SYS
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94 .BR 2064 ,
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95 specify
0
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96 .B \-r0810
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97 so that disassembly starts at that location (or use the
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98 .B \-U
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99 option, which can automatically do this for you). Note that specifying this
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100 manually may have interactions with datablock detection
0
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101 .RB ( \-d ).
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102 .TP
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103 .B \--routines filename
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104 .TP
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105 .B \-R filename
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106 Causes a list of routines to be read from file
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107 .BR filename ,
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108 one per line as if they had been specified on the command line.
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109 .TP
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110 .B \--addresses option
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111 .TP
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112 .B \-a option
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113 Determines if and what kind of address information should be dumped with the
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114 disassembly, if any. Note that this may make your output no longer intelligible
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115 to
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116 .BR xa (1).
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117 The valid options are:
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118 .RS
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119 .TP
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120 .B disabled
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121 Dump source only with no address information. This is the default.
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122 .TP
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123 .B enabled
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124 Write the current address at the beginning of each line.
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125 .TP
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126 .B dump
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127 Write the current address at the beginning of each line, along with a hexdump
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128 of the bytes for which the statement was generated.
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129 .RE
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130 .TP
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131 .B \--colon-newline
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132 .TP
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133 .B \-N
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134 .TP
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135 .B \--no-colon-newline
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136 .TP
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137 .B \-n
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138 A purely cosmetic option to determine how labels are emitted. Many people,
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139 including myself, prefer a listing where the label is given, then a tab,
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140 then the code
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141 .RB ( \-n ).
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142 Since this is
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143 .I my
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144 preference, it's the default. On the other hand, there are also many who
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145 prefer to have the label demarcated by a colon and a newline, and the code
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146 beginning indented on the next line. This is the way
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147 .B d65
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148 used to do it, and is still supported with
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149 .BR \-N .
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150 .TP
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151 .B \--processor option
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152 .TP
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153 .B \-p option
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154 Specify the instruction set. Note that specifying an instruction set that
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155 permits and disassembles illegal and/or undocumented
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156 NMOS opcodes may make your output unintelligible to
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157 .BR xa (1).
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158 Only one may be specified. The valid options are:
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159 .RS
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160 .TP
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161 .B standard-nmos6502
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162 Only official opcodes will be recognized. This is the default.
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163 .TP
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164 .B r65c02
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Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
165 Opcodes specific to the Rockwell 65C02 (R65C02) will also be allowed.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
166 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
167 .B all-nmos6502
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
168 Allows all 256 NMOS opcodes to be disassembled, whether documented or
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
169 undocumented.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
170 Note that instructions generated by this mode are not guaranteed to work on
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
171 all NMOS 6502s.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
172 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
173 .B rational-nmos6502
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
174 Only allows "rational" undocumented instructions. This excludes ANE, SHA,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
175 SHS, SHY, SHX, LXA and LAXS. This is a judgment call.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
176 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
177 .B useful-nmos6502
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
178 Only allows "useful" undocumented instructions. This excludes ANE, SHA,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
179 SHS, SHY, SHX, LXA, LAXS, NOOP and STP. This is a judgment call.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
180 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
181 .B traditional-nmos6502
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
182 Only allows the most widely accepted undocumented instructions based on
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
183 combinations of ALU and RMW operations. This excludes ANE, SHA, SHS, SHY,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
184 SHX, LXA, LAXS, NOOP, STP, ARR, ASR, ANC, SBX and USBC.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
185 This is a judgment call.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
186 .RE
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
187 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
188 .B \--get-sa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
189 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
190 .B \-G
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
191 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
192 .B \--no-get-sa xxxx
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
193 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
194 .B \-g xxxx
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
195 Enables or disables automatic starting address detection. If enabled (the
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
196 default),
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
197 .B dxa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
198 looks at the first two bytes as a 16-bit word in 6502 little-endian format
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
199 and considers that to be the starting address for the object, discarding them
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
200 without further interpretation. This is very useful for Commodore computers in
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
201 particular. If your binary does not have a starting address, you must
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
202 specify one using
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
203 .B \-g
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
204 or
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
205 .B \--no-get-sa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
206 followed by a hexadecimal address. The starting address will then be encoded
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
207 into the output using
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
208 .BR "* =" .
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
209 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
210 .B \--no-word-sa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
211 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
212 .B \-q
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
213 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
214 .B \--word-sa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
215 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
216 .B \-Q
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
217 Only relevant if automatic starting address detection is enabled. If so,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
218 the default is to also emit the starting address as a
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
219 .B \&.word
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
220 pseudo-op before the starting address indicated with
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
221 .B * =
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
222 so that it will be regenerated on re-assembly
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
223 .RB ( \-Q ).
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
224 Otherwise, if this option is disabled, the starting address word will not be
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
225 re-emitted and
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
226 will need to be tacked back on if the target requires it. If you specify an
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
227 address with
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
228 .BR \-g ,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
229 then that address will be used here too.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
230 .TP
14
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
231 .B \--no-detect-basic
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
232 .TP
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
233 .B \-u
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
234 .TP
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
235 .B \--detect-basic
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
236 .TP
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
237 .B \-U
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
238 If the starting address is recognized as a typical BASIC entry point
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
239 (currently supported for Commodore computers), then
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
240 .B dxa
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
241 will attempt to see if a BASIC header is present, and if so, determine its
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
242 length and mark the section as a completely dead
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
243 datablock not eligible for further disassembly or referencing. If the
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
244 first line is a construct such as
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
245 .B 10 SYS
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
246 .BR 2061 ,
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
247 then
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
248 .B dxa
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
249 will additionally parse the provided address and mark it as a valid routine
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
250 if the address is within the boundaries of the disassembled file.
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
251 Note that although its heuristics
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
252 are designed to be permissive, it may nevertheless misinterpret certain files
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
253 with intentionally pathologic line link addresses, and unusual applications
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
254 where the linked machine code is designed to actually
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
255 .I modify
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
256 the BASIC text may not
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
257 disassemble correctly with this option. These are highly atypical situations,
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
258 so this option will likely become the default in a future release.
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
259 .TP
0
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
260 .B \--verbose
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
261 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
262 .B \-v
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
263 Enables verbose output, which may or may not be useful in the same way that
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
264 Schroedinger's Cat may or may not be dead.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
265 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
266 .B \--help
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
267 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
268 .B \-?
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
269 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
270 .B \-V
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
271 A quick summary of options.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
272 .LP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
273 The following options control how program code is scanned and determined
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
274 to be a valid (or invalid) portion of a putative routine.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
275 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
276 .B \--datablock-detection option
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
277 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
278 .B \-d option
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
279 This controls how the program automatically detects data blocks for addresses
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
280 where no previous hints are specified. Only one method may be specified.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
281 The valid options are:
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
282 .RS
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
283 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
284 .B poor
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
285 As much as the object as possible will be listed as program code, even if
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
286 there are illegal instructions present. This is the default.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
287 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
288 .B strict
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
289 Assumes that all declared routines call and execute only valid instructions. If
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
290 any portion of code declared as a routine leads to an address block containing
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
291 illegal opcodes, a consistency error will occur and disassembly will stop.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
292 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
293 .B skip-scanning
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
294 Program addresses that are not referenced by any routine will not be scanned
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
295 for valid routines (thus data a priori).
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
296 .RE
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
297 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
298 .B \--no-external-labels
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
299 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
300 .B \-e
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
301 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
302 .B \--external-labels
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
303 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
304 .B \-E
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
305 Controls whether labels should be generated for addresses outside of the
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
306 program itself. The default is not to (i.e., leave the addresses absolute).
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
307 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
308 .B \--address-tables option
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
309 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
310 .B \-t option
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
311 Controls detection of address tables/dispatch tables. The following options
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
312 are available:
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
313 .RS
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
314 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
315 .B ignore
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
316 Don't attempt to detect address tables.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
317 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
318 .B detect-all
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
319 Address tables referencing any label will be detected.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
320 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
321 .B detect-internal
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
322 Address tables with labels whose addresses lie within the program's address
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
323 range will be detected. This is the default.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
324 .RE
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
325 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
326 .B \--no-suspect-jsr
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
327 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
328 .B \-j
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
329 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
330 .B \--suspect-jsr
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
331 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
332 .B \-J
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
333 These options indicate whether JSRs are always expected to return to the
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
334 following instruction or not. This will affect how routines are parsed. For
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
335 example, the Commodore 128 KERNAL has a routine called PRIMM that prints a
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
336 null-terminated string directly following the JSR instruction, returning after
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
337 the null byte. In this case,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
338 .B \-J
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
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339 should be specified to alert the disassembler that this is possible. The
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
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340 default is to expect "normal" JSRs (i.e.,
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
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341 .BR \-j ).
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
342 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
343 .B \--no-one-byte-routines
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
344 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
345 .B \-o
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
346 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
347 .B \--one-byte-routines
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
348 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
349 .B \-O
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
350 These options permit or inhibit a single RTS, RTI or BRK instruction (or STP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
351 if enabled by the instruction set), or a conditional branch, from being
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
352 automatically identified as a routine. The default is to inhibit this; specific
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
353 cases may be selectively overridden with the
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
354 .B \-r
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
355 option.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
356 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
357 .B \--no-stupid-jumps
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
358 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
359 .B \-m
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
360 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
361 .B \--stupid-jumps
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
362 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
363 .B \-M
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
364 These options consider jumps or branches to the current address (such as
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
365 JMP *, BCC *) to be invalid or valid code depending on which is specified.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
366 Note that BVC * is always accepted as the V flag can sometimes be toggled
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
367 by an external hardware signal. The default is to consider them
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
368 invalid otherwise.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
369 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
370 .B \--no-allow-brk
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
371 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
372 .B \-w
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
373 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
374 .B \--allow-brk
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
375 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
376 .B \-W
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
377 These options control if BRK (or STP if enabled by the instruction set) should
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
378 be treated as a valid exit from a routine, just like RTS or RTI. The default
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
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379 is not to do so.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
380 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
381 .B \--no-suspect-branches
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
382 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
383 .B \-c
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
384 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
385 .B \--suspect-branches
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
386 .TP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
387 .B \-C
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
388 These options are rarely needed, but account for the case where a program may
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
389 intentionally obfuscate its code using branches with unusual destination
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
390 addresses like LDA #2:BEQ *-1. In the default case, this would be considered
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
391 to be invalid and not treated as a routine
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
392 .RB ( \-c );
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
393 if
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
394 .B \-C
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
395 is specified, it would be accepted as valid.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
396 .SH BUGS/TO-DO
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
397 There are probably quite a few bugs yet to be found.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
398 .LP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
399 65816 opcodes are not (yet) supported.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
400 .LP
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
401 There are a few options Marko created that aren't hooked up to anything (and
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
402 are not documented here on purpose). I might finish these later.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
403
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
404 .SH "SEE ALSO"
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
405 .BR xa (1),
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
406 .BR file65 (1),
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
407 .BR ldo65 (1),
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
408 .BR printcbm (1),
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
409 .BR reloc65 (1),
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
410 .BR uncpk (1)
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
411
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
412 .SH AUTHOR
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
413 This manual page was written by Cameron Kaiser <ckaiser@floodgap.com>.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
414 .B dxa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
415 is based on
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
416 .B d65
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
417 0.2.1 by Marko Mäkelä.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
418 Original package (C)1993, 1994, 2000 Marko Mäkelä. Additional changes
14
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
419 (C)2006-2019 Cameron Kaiser.
0
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
420 .B dxa
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
421 is maintained independently.
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
422
14
84c0facfc43c Merge changes from upstream v0.1.4.
Matti Hamalainen <ccr@tnsp.org>
parents: 0
diff changeset
423 .SH WEBSITE
0
4410c9c7750d Initial import.
Matti Hamalainen <ccr@tnsp.org>
parents:
diff changeset
424 http://www.floodgap.com/retrotech/xa/