Mercurial > hg > forks > dxa
annotate opcodes.h @ 16:a2a81589380d default tip
Reformat the whole source via clang-format for better consistency.
author | Matti Hamalainen <ccr@tnsp.org> |
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date | Thu, 14 Oct 2021 01:53:20 +0300 |
parents | 89183953bddc |
children |
rev | line source |
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0 | 1 /*\ |
2 * dxa v0.1.1 -- symbolic 65xx disassembler | |
3 * | |
4 * Copyright (C) 1993, 1994 Marko M\"akel\"a | |
5 * Changes for dxa (C) 2006 Cameron Kaiser | |
6 * | |
7 * This program is free software; you can redistribute it and/or modify | |
8 * it under the terms of the GNU General Public License as published by | |
9 * the Free Software Foundation; either version 2 of the License, or | |
10 * (at your option) any later version. | |
11 * | |
12 * This program is distributed in the hope that it will be useful, | |
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 * GNU General Public License for more details. | |
16 * | |
17 * You should have received a copy of the GNU General Public License | |
18 * along with this program; if not, write to the Free Software | |
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 * | |
21 * Marko does not maintain dxa, so questions specific to dxa should be | |
22 * sent to me at ckaiser@floodgap.com . Otherwise, | |
23 * | |
24 * Contacting the author: | |
25 * | |
26 * Via Internet E-mail: | |
27 * <Marko.Makela@FTP.FUNET.FI> | |
28 * | |
29 * Via Snail Mail: | |
30 * Marko M\"akel\"a | |
31 * Sillitie 10 A | |
32 * FIN-01480 VANTAA | |
33 * Finland | |
34 \*/ | |
35 | |
36 /* opcodes.h - opcodes for different microprocessors */ | |
37 | |
38 #ifndef _OPCODES_H_ | |
39 #define _OPCODES_H_ | |
40 | |
41 #ifdef _DUMP_C_ | |
42 | |
43 static char *mne[] = { "???", "lda", "ldx", "ldy", "sta", "stx", "sty", | |
44 "stz", "adc", "sbc", "dec", "dex", "dey", "inc", "inx", "iny", "cmp", | |
45 "cpx", "cpy", "bit", "and", "ora", "eor", "asl", "lsr", "rol", "ror", | |
46 "tax", "tay", "tsx", "txs", "tya", "tad", "tas", "tda", "tsa", "txy", | |
47 "tyx", "pha", "phx", "phy", "php", "pea", "pei", "per", "phb", "phd", | |
48 "phk", "plb", "pld", "pla", "plx", "ply", "plp", "clc", "cld", "cli", | |
49 "clv", "sec", "sed", "sei", "rep", "sep", "xba", "xce", "bcc", "bcs", | |
50 "bne", "beq", "bra", "brl", "bpl", "bmi", "bvc", "bvs", "jmp", "jml", | |
51 "jsr", "jsl", "rts", "rtl", "rti", "brk", "nop", "trb", "tsb", "wai", | |
52 "bbr0", "bbr1", "bbr2", "bbr3", "bbr4", "bbr5", "bbr6", "bbr7", | |
53 "bbs0", "bbs1", "bbs2", "bbs3", "bbs4", "bbs5", "bbs6", "bbs7", | |
54 "rmb0", "rmb1", "rmb2", "rmb3", "rmb4", "rmb5", "rmb6", "rmb7", | |
55 "smb0", "smb1", "smb2", "smb3", "smb4", "smb5", "smb6", "smb7", "cop", | |
56 "mvn", "mvp", "laxs", "stax", "sha", "shx", "shy", "ane", "lxa", "lae", | |
57 "shs", "sbx", "usbc", "dcmp", "isbc", "rlan", "rrad", "slor", "sreo", | |
58 "arr", "asr", "anc", "noop", "stp", "txa", "ldax" }; | |
59 | |
60 #endif /* _DUMP_C_ */ | |
61 | |
62 enum | |
63 { | |
64 S_ILLEGAL = 0, S_LDA, S_LDX, S_LDY, S_STA, S_STX, S_STY, S_STZ, S_ADC, | |
65 S_SBC, S_DEC, S_DEX, S_DEY, S_INC, S_INX, S_INY, S_CMP, S_CPX, S_CPY, | |
66 S_BIT, S_AND, S_ORA, S_EOR, S_ASL, S_LSR, S_ROL, S_ROR, S_TAX, S_TAY, | |
67 S_TSX, S_TXS, S_TYA, S_TAD, S_TAS, S_TDA, S_TSA, S_TXY, S_TYX, S_PHA, | |
68 S_PHX, S_PHY, S_PHP, S_PEA, S_PEI, S_PER, S_PHB, S_PHD, S_PHK, S_PLB, | |
69 S_PLD, S_PLA, S_PLX, S_PLY, S_PLP, S_CLC, S_CLD, S_CLI, S_CLV, S_SEC, | |
70 S_SED, S_SEI, S_REP, S_SEP, S_XBA, S_XCE, S_BCC, S_BCS, S_BNE, S_BEQ, | |
71 S_BRA, S_BRL, S_BPL, S_BMI, S_BVC, S_BVS, S_JMP, S_JML, S_JSR, S_JSL, | |
72 S_RTS, S_RTL, S_RTI, S_BRK, S_NOP, S_TRB, S_TSB, S_WAI, | |
73 S_BBR0, S_BBR1, S_BBR2, S_BBR3, S_BBR4, S_BBR5, S_BBR6, S_BBR7, | |
74 S_BBS0, S_BBS1, S_BBS2, S_BBS3, S_BBS4, S_BBS5, S_BBS6, S_BBS7, | |
75 S_RMB0, S_RMB1, S_RMB2, S_RMB3, S_RMB4, S_RMB5, S_RMB6, S_RMB7, | |
76 S_SMB0, S_SMB1, S_SMB2, S_SMB3, S_SMB4, S_SMB5, S_SMB6, S_SMB7, | |
77 S_COP, S_MVN, S_MVP, S_LAXS, S_STAX, S_SHA, S_SHX, S_SHY, S_ANE, S_LXA, | |
78 S_LAE, S_SHS, S_SBX, S_USBC, S_DCMP, S_ISBC, S_RLAN, S_RRAD, S_SLOR, | |
79 S_SREO, S_ARR, S_ASR, S_ANC, S_NOOP, S_STP, S_TXA, S_LDAX | |
80 }; | |
81 | |
82 enum | |
83 { | |
84 accu=0, imm, abso, zp, zpx, zpy, absx, absy, | |
85 iabsx, impl, rel, zrel, indx, indy, iabs, ind | |
86 }; | |
87 | |
88 #ifdef _DUMP_C_ | |
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89 static char *prefix[] = {"", "#", "", "", "", "", "", "", "(", "", "", "", "(", "(", "(", "("}; |
0 | 90 |
91 /* static char *postfix[] = { " A", "", "", "", ",X", ",Y", ",X", ",Y", */ | |
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92 static char *postfix[] = {"", "", "", "", ",x", ",y", ",x", ",y", ",x)", "", "", "", ",x)", "),y", ")", ")"}; |
0 | 93 #endif /* _DUMP_C_ */ |
94 | |
95 /* Adressing mode types. */ | |
96 enum | |
97 { | |
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98 absindir, /* absolute parameter (8 or 16 bits) for indirection */ |
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99 absolute, /* absolute parameter (8 or 16 bits), not indexed */ |
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100 other, /* something else (except impimm) */ |
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101 impimm /* implied or immediate parameter */ |
0 | 102 }; |
103 | |
104 #ifndef _SCAN_C_ | |
105 extern unsigned int types[]; | |
106 #else | |
107 unsigned int types[] = { impimm, impimm, absolute, absolute, other, other, | |
108 other, other, other, impimm, other, other, | |
109 other, absindir, absindir, absindir }; | |
110 #endif | |
111 | |
112 /* Number of bytes that instructions of different addressing modes occupy */ | |
113 #ifndef _SCAN_C_ | |
114 extern unsigned int sizes[]; | |
115 #else | |
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116 unsigned int sizes[] = {1, 2, 3, 2, 2, 2, 3, 3, 3, 1, 2, 3, 2, 2, 3, 2}; |
0 | 117 #endif |
118 | |
119 typedef struct opcodes | |
120 { | |
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121 int mnemonic; /* index to mnemonic instruction name table */ |
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122 int admode; /* addressing mode */ |
0 | 123 } opcodes; |
124 | |
125 #ifndef _MAIN_C_ | |
126 extern | |
127 #endif | |
128 opcodes *opset; | |
129 | |
130 #ifdef _MAIN_C_ | |
131 opcodes all_nmos6502[] = | |
132 { | |
133 {S_BRK, impl}, {S_ORA, indx}, {S_STP, impl}, {S_SLOR,indx}, | |
134 {S_NOOP, zp}, {S_ORA, zp}, {S_ASL, zp}, {S_SLOR, zp}, | |
135 {S_PHP, impl}, {S_ORA, imm}, {S_ASL, accu}, {S_ANC, imm}, | |
136 {S_NOOP,abso}, {S_ORA, abso}, {S_ASL, abso}, {S_SLOR, abso}, | |
137 {S_BPL, rel}, {S_ORA, indy}, {S_STP, impl}, {S_SLOR,indy}, | |
138 {S_NOOP, zpx}, {S_ORA, zpx}, {S_ASL, zpx}, {S_SLOR, zpx}, | |
139 {S_CLC, impl}, {S_ORA, absy}, {S_NOOP,impl}, {S_SLOR,absy}, | |
140 {S_NOOP,absx}, {S_ORA, absx}, {S_ASL, absx}, {S_SLOR,absx}, | |
141 | |
142 {S_JSR, abso}, {S_AND, indx}, {S_STP, impl}, {S_RLAN,indx}, | |
143 {S_BIT, zp}, {S_AND, zp}, {S_ROL, zp}, {S_RLAN, zp}, | |
144 {S_PLP, impl}, {S_AND, imm}, {S_ROL, accu}, {S_ANC, imm}, | |
145 {S_BIT, abso}, {S_AND, abso}, {S_ROL, abso}, {S_RLAN,abso}, | |
146 {S_BMI, rel}, {S_AND, indy}, {S_STP, impl}, {S_RLAN,indy}, | |
147 {S_NOOP, zpx}, {S_AND, zpx}, {S_ROL, zpx}, {S_RLAN, zpx}, | |
148 {S_SEC, impl}, {S_AND, absy}, {S_NOOP,impl}, {S_RLAN,absy}, | |
149 {S_NOOP,absx}, {S_AND, absx}, {S_ROL, absx}, {S_RLAN,absx}, | |
150 | |
151 {S_RTI, impl}, {S_EOR, indx}, {S_STP, impl}, {S_SREO,indx}, | |
152 {S_NOOP, zp}, {S_EOR, zp}, {S_LSR, zp}, {S_SREO, zp}, | |
153 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ASR, imm}, | |
154 {S_JMP, abso}, {S_EOR, abso}, {S_LSR, abso}, {S_SREO,abso}, | |
155 {S_BVC, rel}, {S_EOR, indy}, {S_STP, impl}, {S_SREO,indy}, | |
156 {S_NOOP, zpx}, {S_EOR, zpx}, {S_LSR, zpx}, {S_SREO, zpx}, | |
157 {S_CLI, impl}, {S_EOR, absy}, {S_NOOP,impl}, {S_SREO,absy}, | |
158 {S_NOOP,absx}, {S_EOR, absx}, {S_LSR, absx}, {S_SREO,absx}, | |
159 | |
160 {S_RTS, impl}, {S_ADC, indx}, {S_STP, impl}, {S_RRAD,indx}, | |
161 {S_NOOP, zp}, {S_ADC, zp}, {S_ROR, zp}, {S_RRAD, zp}, | |
162 {S_PLA, impl}, {S_ADC, imm}, {S_ROR, accu}, {S_ARR, imm}, | |
163 {S_JMP, iabs}, {S_ADC, abso}, {S_ROR, abso}, {S_RRAD,abso}, | |
164 {S_BVS, rel}, {S_ADC, indy}, {S_STP, impl}, {S_RRAD,indy}, | |
165 {S_NOOP, zpx}, {S_ADC, zpx}, {S_ROR, zpx}, {S_RRAD, zpx}, | |
166 {S_SEI, impl}, {S_ADC, absy}, {S_NOOP,impl}, {S_RRAD,absy}, | |
167 {S_NOOP,absx}, {S_ADC, absx}, {S_ROR, absx}, {S_RRAD,absx}, | |
168 | |
169 {S_NOOP, imm}, {S_STA, indx}, {S_NOOP, imm}, {S_STAX,indx}, | |
170 {S_STY, zp}, {S_STA, zp}, {S_STX, zp}, {S_STAX, zp}, | |
171 {S_DEY, impl}, {S_NOOP, imm}, {S_TXA, impl}, {S_ANE, imm}, | |
172 {S_STY, abso}, {S_STA, abso}, {S_STX, abso}, {S_STAX,abso}, | |
173 {S_BCC, rel}, {S_STA, indy}, {S_STP, impl}, {S_SHA, indy}, | |
174 {S_STY, zpx}, {S_STA, zpx}, {S_STX, zpy}, {S_STAX, zpy}, | |
175 {S_TYA, impl}, {S_STA, absy}, {S_TXS, impl}, {S_SHS, absy}, | |
176 {S_SHY, absx}, {S_STA, absx}, {S_SHX, absx}, {S_SHA, absx}, | |
177 | |
178 {S_LDY, imm}, {S_LDA, indx}, {S_LDX, imm}, {S_LDAX,indy}, | |
179 {S_LDY, zp}, {S_LDA, zp}, {S_LDX, zp}, {S_LDAX, zp}, | |
180 {S_TAY, impl}, {S_LDA, imm}, {S_TAX, impl}, {S_LXA, imm}, | |
181 {S_LDY, abso}, {S_LDA, abso}, {S_LDX, abso}, {S_LDAX,abso}, | |
182 {S_BCS, rel}, {S_LDA, indy}, {S_STP, impl}, {S_LDAX,indy}, | |
183 {S_LDY, zpx}, {S_LDA, zpx}, {S_LDX, zpy}, {S_LDAX, zpy}, | |
184 {S_CLV, impl}, {S_LDA, absy}, {S_TSX, impl}, {S_LAXS,absy}, | |
185 {S_LDY, absx}, {S_LDA, absx}, {S_LDX, absy}, {S_LDAX,absy}, | |
186 | |
187 {S_CPY, imm}, {S_CMP, indx}, {S_NOOP, imm}, {S_DCMP,indx}, | |
188 {S_CPY, zp}, {S_CMP, zp}, {S_DEC, zp}, {S_DCMP, zp}, | |
189 {S_INY, impl}, {S_CMP, imm}, {S_DEX, impl}, {S_SBX, imm}, | |
190 {S_CPY, abso}, {S_CMP, abso}, {S_DEC, abso}, {S_DCMP,abso}, | |
191 {S_BNE, rel}, {S_CMP, indy}, {S_STP, impl}, {S_DCMP,indy}, | |
192 {S_NOOP, zpx}, {S_CMP, zpx}, {S_DEC, zpx}, {S_DCMP, zpx}, | |
193 {S_CLD, impl}, {S_CMP, absy}, {S_NOOP,impl}, {S_DCMP,absy}, | |
194 {S_NOOP,absx}, {S_CMP, absx}, {S_DEC, absx}, {S_DCMP,absx}, | |
195 | |
196 {S_CPX, imm}, {S_SBC, indx}, {S_NOOP, imm}, {S_ISBC,indx}, | |
197 {S_CPX, zp}, {S_SBC, zp}, {S_INC, zp}, {S_ISBC, zp}, | |
198 {S_INX, impl}, {S_SBC, imm}, {S_NOP, impl}, {S_USBC, imm}, | |
199 {S_CPX, abso}, {S_SBC, abso}, {S_INC, abso}, {S_ISBC,abso}, | |
200 {S_BEQ, rel}, {S_SBC, indy}, {S_STP, impl}, {S_ISBC,indy}, | |
201 {S_NOOP, zpx}, {S_SBC, zpx}, {S_INC, zpx}, {S_ISBC, zpx}, | |
202 {S_SED, impl}, {S_SBC, absy}, {S_NOOP,impl}, {S_ISBC,absy}, | |
203 {S_NOOP,absx}, {S_SBC, absx}, {S_INC, absx}, {S_ISBC,absx}, | |
204 }; | |
205 | |
206 /*\ | |
207 * The following NMOS 6502 instructions are missing from the | |
208 * rational_nmos6502 map: | |
209 * | |
210 * ANE SHA SHS SHY SHX LXA LAXS | |
211 \*/ | |
212 | |
213 opcodes rational_nmos6502[] = | |
214 { | |
215 {S_BRK, impl}, {S_ORA, indx}, {S_STP, impl}, {S_SLOR,indx}, | |
216 {S_NOOP, zp}, {S_ORA, zp}, {S_ASL, zp}, {S_SLOR, zp}, | |
217 {S_PHP, impl}, {S_ORA, imm}, {S_ASL, accu}, {S_ANC, imm}, | |
218 {S_NOOP,abso}, {S_ORA, abso}, {S_ASL, abso}, {S_SLOR, abso}, | |
219 {S_BPL, rel}, {S_ORA, indy}, {S_STP, impl}, {S_SLOR,indy}, | |
220 {S_NOOP, zpx}, {S_ORA, zpx}, {S_ASL, zpx}, {S_SLOR, zpx}, | |
221 {S_CLC, impl}, {S_ORA, absy}, {S_NOOP,impl}, {S_SLOR,absy}, | |
222 {S_NOOP,absx}, {S_ORA, absx}, {S_ASL, absx}, {S_SLOR,absx}, | |
223 | |
224 {S_JSR, abso}, {S_AND, indx}, {S_STP, impl}, {S_RLAN,indx}, | |
225 {S_BIT, zp}, {S_AND, zp}, {S_ROL, zp}, {S_RLAN, zp}, | |
226 {S_PLP, impl}, {S_AND, imm}, {S_ROL, accu}, {S_ANC, imm}, | |
227 {S_BIT, abso}, {S_AND, abso}, {S_ROL, abso}, {S_RLAN,abso}, | |
228 {S_BMI, rel}, {S_AND, indy}, {S_STP, impl}, {S_RLAN,indy}, | |
229 {S_NOOP, zpx}, {S_AND, zpx}, {S_ROL, zpx}, {S_RLAN, zpx}, | |
230 {S_SEC, impl}, {S_AND, absy}, {S_NOOP,impl}, {S_RLAN,absy}, | |
231 {S_NOOP,absx}, {S_AND, absx}, {S_ROL, absx}, {S_RLAN,absx}, | |
232 | |
233 {S_RTI, impl}, {S_EOR, indx}, {S_STP, impl}, {S_SREO,indx}, | |
234 {S_NOOP, zp}, {S_EOR, zp}, {S_LSR, zp}, {S_SREO, zp}, | |
235 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ASR, imm}, | |
236 {S_JMP, abso}, {S_EOR, abso}, {S_LSR, abso}, {S_SREO,abso}, | |
237 {S_BVC, rel}, {S_EOR, indy}, {S_STP, impl}, {S_SREO,indy}, | |
238 {S_NOOP, zpx}, {S_EOR, zpx}, {S_LSR, zpx}, {S_SREO, zpx}, | |
239 {S_CLI, impl}, {S_EOR, absy}, {S_NOOP,impl}, {S_SREO,absy}, | |
240 {S_NOOP,absx}, {S_EOR, absx}, {S_LSR, absx}, {S_SREO,absx}, | |
241 | |
242 {S_RTS, impl}, {S_ADC, indx}, {S_STP, impl}, {S_RRAD,indx}, | |
243 {S_NOOP, zp}, {S_ADC, zp}, {S_ROR, zp}, {S_RRAD, zp}, | |
244 {S_PLA, impl}, {S_ADC, imm}, {S_ROR, accu}, {S_ARR, imm}, | |
245 {S_JMP, iabs}, {S_ADC, abso}, {S_ROR, abso}, {S_RRAD,abso}, | |
246 {S_BVS, rel}, {S_ADC, indy}, {S_STP, impl}, {S_RRAD,indy}, | |
247 {S_NOOP, zpx}, {S_ADC, zpx}, {S_ROR, zpx}, {S_RRAD, zpx}, | |
248 {S_SEI, impl}, {S_ADC, absy}, {S_NOOP,impl}, {S_RRAD,absy}, | |
249 {S_NOOP,absx}, {S_ADC, absx}, {S_ROR, absx}, {S_RRAD,absx}, | |
250 | |
251 {S_NOOP, imm}, {S_STA, indx}, {S_NOOP, imm}, {S_STAX,indx}, | |
252 {S_STY, zp}, {S_STA, zp}, {S_STX, zp}, {S_STAX, zp}, | |
253 {S_DEY, impl}, {S_NOOP, imm}, {S_TXA, impl}, {S_ILLEGAL,0}, | |
254 {S_STY, abso}, {S_STA, abso}, {S_STX, abso}, {S_STAX,abso}, | |
255 {S_BCC, rel}, {S_STA, indy}, {S_STP, impl}, {S_ILLEGAL,0}, | |
256 {S_STY, zpx}, {S_STA, zpx}, {S_STX, zpy}, {S_STAX, zpy}, | |
257 {S_TYA, impl}, {S_STA, absy}, {S_TXS, impl}, {S_ILLEGAL,0}, | |
258 {S_ILLEGAL,0}, {S_STA, absx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
259 | |
260 {S_LDY, imm}, {S_LDA, indx}, {S_LDX, imm}, {S_LDAX,indy}, | |
261 {S_LDY, zp}, {S_LDA, zp}, {S_LDX, zp}, {S_LDAX, zp}, | |
262 {S_TAY, impl}, {S_LDA, imm}, {S_TAX, impl}, {S_ILLEGAL,0}, | |
263 {S_LDY, abso}, {S_LDA, abso}, {S_LDX, abso}, {S_LDAX,abso}, | |
264 {S_BCS, rel}, {S_LDA, indy}, {S_STP, impl}, {S_LDAX,indy}, | |
265 {S_LDY, zpx}, {S_LDA, zpx}, {S_LDX, zpy}, {S_LDAX, zpy}, | |
266 {S_CLV, impl}, {S_LDA, absy}, {S_TSX, impl}, {S_ILLEGAL,0}, | |
267 {S_LDY, absx}, {S_LDA, absx}, {S_LDX, absy}, {S_LDAX,absy}, | |
268 | |
269 {S_CPY, imm}, {S_CMP, indx}, {S_NOOP, imm}, {S_DCMP,indx}, | |
270 {S_CPY, zp}, {S_CMP, zp}, {S_DEC, zp}, {S_DCMP, zp}, | |
271 {S_INY, impl}, {S_CMP, imm}, {S_DEX, impl}, {S_SBX, imm}, | |
272 {S_CPY, abso}, {S_CMP, abso}, {S_DEC, abso}, {S_DCMP,abso}, | |
273 {S_BNE, rel}, {S_CMP, indy}, {S_STP, impl}, {S_DCMP,indy}, | |
274 {S_NOOP, zpx}, {S_CMP, zpx}, {S_DEC, zpx}, {S_DCMP, zpx}, | |
275 {S_CLD, impl}, {S_CMP, absy}, {S_NOOP,impl}, {S_DCMP,absy}, | |
276 {S_NOOP,absx}, {S_CMP, absx}, {S_DEC, absx}, {S_DCMP,absx}, | |
277 | |
278 {S_CPX, imm}, {S_SBC, indx}, {S_NOOP, imm}, {S_ISBC,indx}, | |
279 {S_CPX, zp}, {S_SBC, zp}, {S_INC, zp}, {S_ISBC, zp}, | |
280 {S_INX, impl}, {S_SBC, imm}, {S_NOP, impl}, {S_USBC, imm}, | |
281 {S_CPX, abso}, {S_SBC, abso}, {S_INC, abso}, {S_ISBC,abso}, | |
282 {S_BEQ, rel}, {S_SBC, indy}, {S_STP, impl}, {S_ISBC,indy}, | |
283 {S_NOOP, zpx}, {S_SBC, zpx}, {S_INC, zpx}, {S_ISBC, zpx}, | |
284 {S_SED, impl}, {S_SBC, absy}, {S_NOOP,impl}, {S_ISBC,absy}, | |
285 {S_NOOP,absx}, {S_SBC, absx}, {S_INC, absx}, {S_ISBC,absx}, | |
286 }; | |
287 | |
288 /*\ | |
289 * The following NMOS 6502 instructions are missing from the | |
290 * useful_nmos6502 map: | |
291 * | |
292 * ANE SHA SHS SHY SHX LXA LAXS NOOP STP | |
293 \*/ | |
294 | |
295 opcodes useful_nmos6502[] = | |
296 { | |
297 {S_BRK, impl}, {S_ORA, indx}, {S_ILLEGAL,0}, {S_SLOR,indx}, | |
298 {S_ILLEGAL,0}, {S_ORA, zp}, {S_ASL, zp}, {S_SLOR, zp}, | |
299 {S_PHP, impl}, {S_ORA, imm}, {S_ASL, accu}, {S_ANC, imm}, | |
300 {S_ILLEGAL,0}, {S_ORA, abso}, {S_ASL, abso}, {S_SLOR,abso}, | |
301 {S_BPL, rel}, {S_ORA, indy}, {S_ILLEGAL,0}, {S_SLOR,indy}, | |
302 {S_ILLEGAL,0}, {S_ORA, zpx}, {S_ASL, zpx}, {S_SLOR, zpx}, | |
303 {S_CLC, impl}, {S_ORA, absy}, {S_ILLEGAL,0}, {S_SLOR,absy}, | |
304 {S_ILLEGAL,0}, {S_ORA, absx}, {S_ASL, absx}, {S_SLOR,absx}, | |
305 | |
306 {S_JSR, abso}, {S_AND, indx}, {S_ILLEGAL,0}, {S_RLAN,indx}, | |
307 {S_BIT, zp}, {S_AND, zp}, {S_ROL, zp}, {S_RLAN, zp}, | |
308 {S_PLP, impl}, {S_AND, imm}, {S_ROL, accu}, {S_ANC, imm}, | |
309 {S_BIT, abso}, {S_AND, abso}, {S_ROL, abso}, {S_RLAN,abso}, | |
310 {S_BMI, rel}, {S_AND, indy}, {S_ILLEGAL,0}, {S_RLAN,indy}, | |
311 {S_ILLEGAL,0}, {S_AND, zpx}, {S_ROL, zpx}, {S_RLAN, zpx}, | |
312 {S_SEC, impl}, {S_AND, absy}, {S_ILLEGAL,0}, {S_RLAN,absy}, | |
313 {S_ILLEGAL,0}, {S_AND, absx}, {S_ROL, absx}, {S_RLAN,absx}, | |
314 | |
315 {S_RTI, impl}, {S_EOR, indx}, {S_ILLEGAL,0}, {S_SREO,indx}, | |
316 {S_ILLEGAL,0}, {S_EOR, zp}, {S_LSR, zp}, {S_SREO, zp}, | |
317 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ASR, imm}, | |
318 {S_JMP, abso}, {S_EOR, abso}, {S_LSR, abso}, {S_SREO,abso}, | |
319 {S_BVC, rel}, {S_EOR, indy}, {S_ILLEGAL,0}, {S_SREO,indy}, | |
320 {S_ILLEGAL,0}, {S_EOR, zpx}, {S_LSR, zpx}, {S_SREO, zpx}, | |
321 {S_CLI, impl}, {S_EOR, absy}, {S_ILLEGAL,0}, {S_SREO,absy}, | |
322 {S_ILLEGAL,0}, {S_EOR, absx}, {S_LSR, absx}, {S_SREO,absx}, | |
323 | |
324 {S_RTS, impl}, {S_ADC, indx}, {S_ILLEGAL,0}, {S_RRAD,indx}, | |
325 {S_ILLEGAL,0}, {S_ADC, zp}, {S_ROR, zp}, {S_RRAD, zp}, | |
326 {S_PLA, impl}, {S_ADC, imm}, {S_ROR, accu}, {S_ARR, imm}, | |
327 {S_JMP, iabs}, {S_ADC, abso}, {S_ROR, abso}, {S_RRAD,abso}, | |
328 {S_BVS, rel}, {S_ADC, indy}, {S_ILLEGAL,0}, {S_RRAD,indy}, | |
329 {S_ILLEGAL,0}, {S_ADC, zpx}, {S_ROR, zpx}, {S_RRAD, zpx}, | |
330 {S_SEI, impl}, {S_ADC, absy}, {S_ILLEGAL,0}, {S_RRAD,absy}, | |
331 {S_ILLEGAL,0}, {S_ADC, absx}, {S_ROR, absx}, {S_RRAD,absx}, | |
332 | |
333 {S_ILLEGAL,0}, {S_STA, indx}, {S_ILLEGAL,0}, {S_STAX,indx}, | |
334 {S_STY, zp}, {S_STA, zp}, {S_STX, zp}, {S_STAX, zp}, | |
335 {S_DEY, impl}, {S_ILLEGAL,0}, {S_TXA, impl}, {S_ILLEGAL,0}, | |
336 {S_STY, abso}, {S_STA, abso}, {S_STX, abso}, {S_STAX,abso}, | |
337 {S_BCC, rel}, {S_STA, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
338 {S_STY, zpx}, {S_STA, zpx}, {S_STX, zpy}, {S_STAX, zpy}, | |
339 {S_TYA, impl}, {S_STA, absy}, {S_TXS, impl}, {S_ILLEGAL,0}, | |
340 {S_ILLEGAL,0}, {S_STA, absx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
341 | |
342 {S_LDY, imm}, {S_LDA, indx}, {S_LDX, imm}, {S_LDAX,indy}, | |
343 {S_LDY, zp}, {S_LDA, zp}, {S_LDX, zp}, {S_LDAX, zp}, | |
344 {S_TAY, impl}, {S_LDA, imm}, {S_TAX, impl}, {S_ILLEGAL,0}, | |
345 {S_LDY, abso}, {S_LDA, abso}, {S_LDX, abso}, {S_LDAX,abso}, | |
346 {S_BCS, rel}, {S_LDA, indy}, {S_ILLEGAL,0}, {S_LDAX,indy}, | |
347 {S_LDY, zpx}, {S_LDA, zpx}, {S_LDX, zpy}, {S_LDAX, zpy}, | |
348 {S_CLV, impl}, {S_LDA, absy}, {S_TSX, impl}, {S_ILLEGAL,0}, | |
349 {S_LDY, absx}, {S_LDA, absx}, {S_LDX, absy}, {S_LDAX,absy}, | |
350 | |
351 {S_CPY, imm}, {S_CMP, indx}, {S_ILLEGAL,0}, {S_DCMP,indx}, | |
352 {S_CPY, zp}, {S_CMP, zp}, {S_DEC, zp}, {S_DCMP, zp}, | |
353 {S_INY, impl}, {S_CMP, imm}, {S_DEX, impl}, {S_SBX, imm}, | |
354 {S_CPY, abso}, {S_CMP, abso}, {S_DEC, abso}, {S_DCMP,abso}, | |
355 {S_BNE, rel}, {S_CMP, indy}, {S_ILLEGAL,0}, {S_DCMP,indy}, | |
356 {S_ILLEGAL,0}, {S_CMP, zpx}, {S_DEC, zpx}, {S_DCMP, zpx}, | |
357 {S_CLD, impl}, {S_CMP, absy}, {S_ILLEGAL,0}, {S_DCMP,absy}, | |
358 {S_ILLEGAL,0}, {S_CMP, absx}, {S_DEC, absx}, {S_DCMP,absx}, | |
359 | |
360 {S_CPX, imm}, {S_SBC, indx}, {S_ILLEGAL,0}, {S_ISBC,indx}, | |
361 {S_CPX, zp}, {S_SBC, zp}, {S_INC, zp}, {S_ISBC, zp}, | |
362 {S_INX, impl}, {S_SBC, imm}, {S_NOP, impl}, {S_USBC, imm}, | |
363 {S_CPX, abso}, {S_SBC, abso}, {S_INC, abso}, {S_ISBC,abso}, | |
364 {S_BEQ, rel}, {S_SBC, indy}, {S_ILLEGAL,0}, {S_ISBC,indy}, | |
365 {S_ILLEGAL,0}, {S_SBC, zpx}, {S_INC, zpx}, {S_ISBC, zpx}, | |
366 {S_SED, impl}, {S_SBC, absy}, {S_ILLEGAL,0}, {S_ISBC,absy}, | |
367 {S_ILLEGAL,0}, {S_SBC, absx}, {S_INC, absx}, {S_ISBC,absx}, | |
368 }; | |
369 | |
370 /*\ | |
371 * The following NMOS 6502 instructions are missing from the | |
372 * traditional_nmos6502 map: | |
373 * | |
374 * ANE SHA SHS SHY SHX LXA LAXS NOOP STP | |
375 * ARR ASR ANC SBX USBC | |
376 \*/ | |
377 | |
378 opcodes traditional_nmos6502[] = | |
379 { | |
380 {S_BRK, impl}, {S_ORA, indx}, {S_ILLEGAL,0}, {S_SLOR,indx}, | |
381 {S_ILLEGAL,0}, {S_ORA, zp}, {S_ASL, zp}, {S_SLOR, zp}, | |
382 {S_PHP, impl}, {S_ORA, imm}, {S_ASL, accu}, {S_ILLEGAL,0}, | |
383 {S_ILLEGAL,0}, {S_ORA, abso}, {S_ASL, abso}, {S_SLOR,abso}, | |
384 {S_BPL, rel}, {S_ORA, indy}, {S_ILLEGAL,0}, {S_SLOR,indy}, | |
385 {S_ILLEGAL,0}, {S_ORA, zpx}, {S_ASL, zpx}, {S_SLOR, zpx}, | |
386 {S_CLC, impl}, {S_ORA, absy}, {S_ILLEGAL,0}, {S_SLOR,absy}, | |
387 {S_ILLEGAL,0}, {S_ORA, absx}, {S_ASL, absx}, {S_SLOR,absx}, | |
388 | |
389 {S_JSR, abso}, {S_AND, indx}, {S_ILLEGAL,0}, {S_RLAN,indx}, | |
390 {S_BIT, zp}, {S_AND, zp}, {S_ROL, zp}, {S_RLAN, zp}, | |
391 {S_PLP, impl}, {S_AND, imm}, {S_ROL, accu}, {S_ILLEGAL,0}, | |
392 {S_BIT, abso}, {S_AND, abso}, {S_ROL, abso}, {S_RLAN,abso}, | |
393 {S_BMI, rel}, {S_AND, indy}, {S_ILLEGAL,0}, {S_RLAN,indy}, | |
394 {S_ILLEGAL,0}, {S_AND, zpx}, {S_ROL, zpx}, {S_RLAN, zpx}, | |
395 {S_SEC, impl}, {S_AND, absy}, {S_ILLEGAL,0}, {S_RLAN,absy}, | |
396 {S_ILLEGAL,0}, {S_AND, absx}, {S_ROL, absx}, {S_RLAN,absx}, | |
397 | |
398 {S_RTI, impl}, {S_EOR, indx}, {S_ILLEGAL,0}, {S_SREO,indx}, | |
399 {S_ILLEGAL,0}, {S_EOR, zp}, {S_LSR, zp}, {S_SREO, zp}, | |
400 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ILLEGAL,0}, | |
401 {S_JMP, abso}, {S_EOR, abso}, {S_LSR, abso}, {S_SREO,abso}, | |
402 {S_BVC, rel}, {S_EOR, indy}, {S_ILLEGAL,0}, {S_SREO,indy}, | |
403 {S_ILLEGAL,0}, {S_EOR, zpx}, {S_LSR, zpx}, {S_SREO, zpx}, | |
404 {S_CLI, impl}, {S_EOR, absy}, {S_ILLEGAL,0}, {S_SREO,absy}, | |
405 {S_ILLEGAL,0}, {S_EOR, absx}, {S_LSR, absx}, {S_SREO,absx}, | |
406 | |
407 {S_RTS, impl}, {S_ADC, indx}, {S_ILLEGAL,0}, {S_RRAD,indx}, | |
408 {S_ILLEGAL,0}, {S_ADC, zp}, {S_ROR, zp}, {S_RRAD, zp}, | |
409 {S_PLA, impl}, {S_ADC, imm}, {S_ROR, accu}, {S_ILLEGAL,0}, | |
410 {S_JMP, iabs}, {S_ADC, abso}, {S_ROR, abso}, {S_RRAD,abso}, | |
411 {S_BVS, rel}, {S_ADC, indy}, {S_ILLEGAL,0}, {S_RRAD,indy}, | |
412 {S_ILLEGAL,0}, {S_ADC, zpx}, {S_ROR, zpx}, {S_RRAD, zpx}, | |
413 {S_SEI, impl}, {S_ADC, absy}, {S_ILLEGAL,0}, {S_RRAD,absy}, | |
414 {S_ILLEGAL,0}, {S_ADC, absx}, {S_ROR, absx}, {S_RRAD,absx}, | |
415 | |
416 {S_ILLEGAL,0}, {S_STA, indx}, {S_ILLEGAL,0}, {S_STAX,indx}, | |
417 {S_STY, zp}, {S_STA, zp}, {S_STX, zp}, {S_STAX, zp}, | |
418 {S_DEY, impl}, {S_ILLEGAL,0}, {S_TXA, impl}, {S_ILLEGAL,0}, | |
419 {S_STY, abso}, {S_STA, abso}, {S_STX, abso}, {S_STAX,abso}, | |
420 {S_BCC, rel}, {S_STA, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
421 {S_STY, zpx}, {S_STA, zpx}, {S_STX, zpy}, {S_STAX, zpy}, | |
422 {S_TYA, impl}, {S_STA, absy}, {S_TXS, impl}, {S_ILLEGAL,0}, | |
423 {S_ILLEGAL,0}, {S_STA, absx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
424 | |
425 {S_LDY, imm}, {S_LDA, indx}, {S_LDX, imm}, {S_LDAX,indy}, | |
426 {S_LDY, zp}, {S_LDA, zp}, {S_LDX, zp}, {S_LDAX, zp}, | |
427 {S_TAY, impl}, {S_LDA, imm}, {S_TAX, impl}, {S_ILLEGAL,0}, | |
428 {S_LDY, abso}, {S_LDA, abso}, {S_LDX, abso}, {S_LDAX,abso}, | |
429 {S_BCS, rel}, {S_LDA, indy}, {S_ILLEGAL,0}, {S_LDAX,indy}, | |
430 {S_LDY, zpx}, {S_LDA, zpx}, {S_LDX, zpy}, {S_LDAX, zpy}, | |
431 {S_CLV, impl}, {S_LDA, absy}, {S_TSX, impl}, {S_ILLEGAL,0}, | |
432 {S_LDY, absx}, {S_LDA, absx}, {S_LDX, absy}, {S_LDAX,absy}, | |
433 | |
434 {S_CPY, imm}, {S_CMP, indx}, {S_ILLEGAL,0}, {S_DCMP,indx}, | |
435 {S_CPY, zp}, {S_CMP, zp}, {S_DEC, zp}, {S_DCMP, zp}, | |
436 {S_INY, impl}, {S_CMP, imm}, {S_DEX, impl}, {S_ILLEGAL,0}, | |
437 {S_CPY, abso}, {S_CMP, abso}, {S_DEC, abso}, {S_DCMP,abso}, | |
438 {S_BNE, rel}, {S_CMP, indy}, {S_ILLEGAL,0}, {S_DCMP,indy}, | |
439 {S_ILLEGAL,0}, {S_CMP, zpx}, {S_DEC, zpx}, {S_DCMP, zpx}, | |
440 {S_CLD, impl}, {S_CMP, absy}, {S_ILLEGAL,0}, {S_DCMP,absy}, | |
441 {S_ILLEGAL,0}, {S_CMP, absx}, {S_DEC, absx}, {S_DCMP,absx}, | |
442 | |
443 {S_CPX, imm}, {S_SBC, indx}, {S_ILLEGAL,0}, {S_ISBC,indx}, | |
444 {S_CPX, zp}, {S_SBC, zp}, {S_INC, zp}, {S_ISBC, zp}, | |
445 {S_INX, impl}, {S_SBC, imm}, {S_NOP, impl}, {S_ILLEGAL,0}, | |
446 {S_CPX, abso}, {S_SBC, abso}, {S_INC, abso}, {S_ISBC,abso}, | |
447 {S_BEQ, rel}, {S_SBC, indy}, {S_ILLEGAL,0}, {S_ISBC,indy}, | |
448 {S_ILLEGAL,0}, {S_SBC, zpx}, {S_INC, zpx}, {S_ISBC, zpx}, | |
449 {S_SED, impl}, {S_SBC, absy}, {S_ILLEGAL,0}, {S_ISBC,absy}, | |
450 {S_ILLEGAL,0}, {S_SBC, absx}, {S_INC, absx}, {S_ISBC,absx}, | |
451 }; | |
452 | |
453 /*\ | |
454 * The following is the officially documented | |
455 * MOS 6502 instruction set. | |
456 \*/ | |
457 | |
458 opcodes standard_nmos6502[] = | |
459 { | |
460 {S_BRK, impl}, {S_ORA, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
461 {S_ILLEGAL,0}, {S_ORA, zp}, {S_ASL, zp}, {S_ILLEGAL,0}, | |
462 {S_PHP, impl}, {S_ORA, imm}, {S_ASL, accu}, {S_ILLEGAL,0}, | |
463 {S_ILLEGAL,0}, {S_ORA, abso}, {S_ASL, abso}, {S_ILLEGAL,0}, | |
464 {S_BPL, rel}, {S_ORA, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
465 {S_ILLEGAL,0}, {S_ORA, zpx}, {S_ASL, zpx}, {S_ILLEGAL,0}, | |
466 {S_CLC, impl}, {S_ORA, absy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
467 {S_ILLEGAL,0}, {S_ORA, absx}, {S_ASL, absx}, {S_ILLEGAL,0}, | |
468 | |
469 {S_JSR, abso}, {S_AND, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
470 {S_BIT, zp}, {S_AND, zp}, {S_ROL, zp}, {S_ILLEGAL,0}, | |
471 {S_PLP, impl}, {S_AND, imm}, {S_ROL, accu}, {S_ILLEGAL,0}, | |
472 {S_BIT, abso}, {S_AND, abso}, {S_ROL, abso}, {S_ILLEGAL,0}, | |
473 {S_BMI, rel}, {S_AND, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
474 {S_ILLEGAL,0}, {S_AND, zpx}, {S_ROL, zpx}, {S_ILLEGAL,0}, | |
475 {S_SEC, impl}, {S_AND, absy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
476 {S_ILLEGAL,0}, {S_AND, absx}, {S_ROL, absx}, {S_ILLEGAL,0}, | |
477 | |
478 {S_RTI, impl}, {S_EOR, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
479 {S_ILLEGAL,0}, {S_EOR, zp}, {S_LSR, zp}, {S_ILLEGAL,0}, | |
480 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ILLEGAL,0}, | |
481 {S_JMP, abso}, {S_EOR, abso}, {S_LSR, abso}, {S_ILLEGAL,0}, | |
482 {S_BVC, rel}, {S_EOR, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
483 {S_ILLEGAL,0}, {S_EOR, zpx}, {S_LSR, zpx}, {S_ILLEGAL,0}, | |
484 {S_CLI, impl}, {S_EOR, absy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
485 {S_ILLEGAL,0}, {S_EOR, absx}, {S_LSR, absx}, {S_ILLEGAL,0}, | |
486 | |
487 {S_RTS, impl}, {S_ADC, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
488 {S_ILLEGAL,0}, {S_ADC, zp}, {S_ROR, zp}, {S_ILLEGAL,0}, | |
489 {S_PLA, impl}, {S_ADC, imm}, {S_ROR, accu}, {S_ILLEGAL,0}, | |
490 {S_JMP, iabs}, {S_ADC, abso}, {S_ROR, abso}, {S_ILLEGAL,0}, | |
491 {S_BVS, rel}, {S_ADC, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
492 {S_ILLEGAL,0}, {S_ADC, zpx}, {S_ROR, zpx}, {S_ILLEGAL,0}, | |
493 {S_SEI, impl}, {S_ADC, absy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
494 {S_ILLEGAL,0}, {S_ADC, absx}, {S_ROR, absx}, {S_ILLEGAL,0}, | |
495 | |
496 {S_ILLEGAL,0}, {S_STA, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
497 {S_STY, zp}, {S_STA, zp}, {S_STX, zp}, {S_ILLEGAL,0}, | |
498 {S_DEY, impl}, {S_ILLEGAL,0}, {S_TXA, impl}, {S_ILLEGAL,0}, | |
499 {S_STY, abso}, {S_STA, abso}, {S_STX, abso}, {S_ILLEGAL,0}, | |
500 {S_BCC, rel}, {S_STA, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
501 {S_STY, zpx}, {S_STA, zpx}, {S_STX, zpy}, {S_ILLEGAL,0}, | |
502 {S_TYA, impl}, {S_STA, absy}, {S_TXS, impl}, {S_ILLEGAL,0}, | |
503 {S_ILLEGAL,0}, {S_STA, absx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
504 | |
505 {S_LDY, imm}, {S_LDA, indx}, {S_LDX, imm}, {S_ILLEGAL,0}, | |
506 {S_LDY, zp}, {S_LDA, zp}, {S_LDX, zp}, {S_ILLEGAL,0}, | |
507 {S_TAY, impl}, {S_LDA, imm}, {S_TAX, impl}, {S_ILLEGAL,0}, | |
508 {S_LDY, abso}, {S_LDA, abso}, {S_LDX, abso}, {S_ILLEGAL,0}, | |
509 {S_BCS, rel}, {S_LDA, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
510 {S_LDY, zpx}, {S_LDA, zpx}, {S_LDX, zpy}, {S_ILLEGAL,0}, | |
511 {S_CLV, impl}, {S_LDA, absy}, {S_TSX, impl}, {S_ILLEGAL,0}, | |
512 {S_LDY, absx}, {S_LDA, absx}, {S_LDX, absy}, {S_ILLEGAL,0}, | |
513 | |
514 {S_CPY, imm}, {S_CMP, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
515 {S_CPY, zp}, {S_CMP, zp}, {S_DEC, zp}, {S_ILLEGAL,0}, | |
516 {S_INY, impl}, {S_CMP, imm}, {S_DEX, impl}, {S_ILLEGAL,0}, | |
517 {S_CPY, abso}, {S_CMP, abso}, {S_DEC, abso}, {S_ILLEGAL,0}, | |
518 {S_BNE, rel}, {S_CMP, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
519 {S_ILLEGAL,0}, {S_CMP, zpx}, {S_DEC, zpx}, {S_ILLEGAL,0}, | |
520 {S_CLD, impl}, {S_CMP, absy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
521 {S_ILLEGAL,0}, {S_CMP, absx}, {S_DEC, absx}, {S_ILLEGAL,0}, | |
522 | |
523 {S_CPX, imm}, {S_SBC, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
524 {S_CPX, zp}, {S_SBC, zp}, {S_INC, zp}, {S_ILLEGAL,0}, | |
525 {S_INX, impl}, {S_SBC, imm}, {S_NOP, impl}, {S_ILLEGAL,0}, | |
526 {S_CPX, abso}, {S_SBC, abso}, {S_INC, abso}, {S_ILLEGAL,0}, | |
527 {S_BEQ, rel}, {S_SBC, indy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
528 {S_ILLEGAL,0}, {S_SBC, zpx}, {S_INC, zpx}, {S_ILLEGAL,0}, | |
529 {S_SED, impl}, {S_SBC, absy}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
530 {S_ILLEGAL,0}, {S_SBC, absx}, {S_INC, absx}, {S_ILLEGAL,0}, | |
531 }; | |
532 | |
533 | |
534 /*\ | |
535 * The following is the officially documented | |
536 * Rockwell R65C02 instruction set. | |
537 \*/ | |
538 | |
539 opcodes r65c02[] = | |
540 { | |
541 {S_BRK, impl}, {S_ORA, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
542 {S_TSB, zp}, {S_ORA, zp}, {S_ASL, zp}, {S_RMB0, zp}, | |
543 {S_PHP, impl}, {S_ORA, imm}, {S_ASL, accu}, {S_ILLEGAL,0}, | |
544 {S_TSB, abso}, {S_ORA, abso}, {S_ASL, abso}, {S_BBR0,zrel}, | |
545 {S_BPL, rel}, {S_ORA, indy}, {S_ORA, ind}, {S_ILLEGAL,0}, | |
546 {S_TRB, zp}, {S_ORA, zpx}, {S_ASL, zpx}, {S_RMB1, zp}, | |
547 {S_CLC, impl}, {S_ORA, absy}, {S_INC, accu}, {S_ILLEGAL,0}, | |
548 {S_TRB, abso}, {S_ORA, absx}, {S_ASL, absx}, {S_BBR1,zrel}, | |
549 | |
550 {S_JSR, abso}, {S_AND, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
551 {S_BIT, zp}, {S_AND, zp}, {S_ROL, zp}, {S_RMB2, zp}, | |
552 {S_PLP, impl}, {S_AND, imm}, {S_ROL, accu}, {S_ILLEGAL,0}, | |
553 {S_BIT, abso}, {S_AND, abso}, {S_ROL, abso}, {S_BBR2,zrel}, | |
554 {S_BMI, rel}, {S_AND, indy}, {S_AND, ind}, {S_ILLEGAL,0}, | |
555 {S_BIT, zpx}, {S_AND, zpx}, {S_ROL, zpx}, {S_RMB3, zp}, | |
556 {S_SEC, impl}, {S_AND, absy}, {S_DEC, accu}, {S_ILLEGAL,0}, | |
557 {S_BIT, absx}, {S_AND, absx}, {S_ROL, absx}, {S_BBR3,zrel}, | |
558 | |
559 {S_RTI, impl}, {S_EOR, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
560 {S_ILLEGAL,0}, {S_EOR, zp}, {S_LSR, zp}, {S_RMB4, zp}, | |
561 {S_PHA, impl}, {S_EOR, imm}, {S_LSR, accu}, {S_ILLEGAL,0}, | |
562 {S_JMP, abso}, {S_EOR, abso}, {S_LSR, abso}, {S_BBR4,zrel}, | |
563 {S_BVC, rel}, {S_EOR, indy}, {S_EOR, ind}, {S_ILLEGAL,0}, | |
564 {S_ILLEGAL,0}, {S_EOR, zpx}, {S_LSR, zpx}, {S_RMB5, zp}, | |
565 {S_CLI, impl}, {S_EOR, absy}, {S_PHY, impl}, {S_ILLEGAL,0}, | |
566 {S_ILLEGAL,0}, {S_EOR, absx}, {S_LSR, absx}, {S_BBR5,zrel}, | |
567 | |
568 {S_RTS, impl}, {S_ADC, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
569 {S_STZ, zp}, {S_ADC, zp}, {S_ROR, zp}, {S_RMB6, zp}, | |
570 {S_PLA, impl}, {S_ADC, imm}, {S_ROR, accu}, {S_ILLEGAL,0}, | |
571 {S_JMP, iabs}, {S_ADC, abso}, {S_ROR, abso}, {S_BBR6,zrel}, | |
572 {S_BVS, rel}, {S_ADC, indy}, {S_ADC, ind}, {S_ILLEGAL,0}, | |
573 {S_STZ, zpx}, {S_ADC, zpx}, {S_ROR, zpx}, {S_RMB7, zp}, | |
574 {S_SEI, impl}, {S_ADC, absy}, {S_PLY, impl}, {S_ILLEGAL,0}, | |
575 {S_JMP,iabsx}, {S_ADC, absx}, {S_ROR, absx}, {S_BBR7,zrel}, | |
576 | |
577 {S_BRA, rel}, {S_STA, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
578 {S_STY, zp}, {S_STA, zp}, {S_STX, zp}, {S_SMB0, zp}, | |
579 {S_DEY, impl}, {S_BIT, imm}, {S_TXA, impl}, {S_ILLEGAL,0}, | |
580 {S_STY, abso}, {S_STA, abso}, {S_STX, abso}, {S_BBS0,zrel}, | |
581 {S_BCC, rel}, {S_STA, indy}, {S_STA, ind}, {S_ILLEGAL,0}, | |
582 {S_STY, zpx}, {S_STA, zpx}, {S_STX, zpy}, {S_SMB1, zp}, | |
583 {S_TYA, impl}, {S_STA, absy}, {S_TXS, impl}, {S_ILLEGAL,0}, | |
584 {S_STZ, abso}, {S_STA, absx}, {S_STZ, absx}, {S_BBS1,zrel}, | |
585 | |
586 {S_LDY, imm}, {S_LDA, indx}, {S_LDX, imm}, {S_ILLEGAL,0}, | |
587 {S_LDY, zp}, {S_LDA, zp}, {S_LDX, zp}, {S_SMB2, zp}, | |
588 {S_TAY, impl}, {S_LDA, imm}, {S_TAX, impl}, {S_ILLEGAL,0}, | |
589 {S_LDY, abso}, {S_LDA, abso}, {S_LDX, abso}, {S_BBS2,zrel}, | |
590 {S_BCS, rel}, {S_LDA, indy}, {S_LDA, ind}, {S_ILLEGAL,0}, | |
591 {S_LDY, zpx}, {S_LDA, zpx}, {S_LDX, zpy}, {S_SMB3, zp}, | |
592 {S_CLV, impl}, {S_LDA, absy}, {S_TSX, impl}, {S_ILLEGAL,0}, | |
593 {S_LDY, absx}, {S_LDA, absx}, {S_LDX, absy}, {S_BBS3,zrel}, | |
594 | |
595 {S_CPY, imm}, {S_CMP, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
596 {S_CPY, zp}, {S_CMP, zp}, {S_DEC, zp}, {S_SMB4, zp}, | |
597 {S_INY, impl}, {S_CMP, imm}, {S_DEX, impl}, {S_ILLEGAL,0}, | |
598 {S_CPY, abso}, {S_CMP, abso}, {S_DEC, abso}, {S_BBS4,zrel}, | |
599 {S_BNE, rel}, {S_CMP, indy}, {S_CMP, ind}, {S_ILLEGAL,0}, | |
600 {S_ILLEGAL,0}, {S_CMP, zpx}, {S_DEC, zpx}, {S_SMB5, zp}, | |
601 {S_CLD, impl}, {S_CMP, absy}, {S_PHX, impl}, {S_ILLEGAL,0}, | |
602 {S_ILLEGAL,0}, {S_CMP, absx}, {S_DEC, absx}, {S_BBS5,zrel}, | |
603 | |
604 {S_CPX, imm}, {S_SBC, indx}, {S_ILLEGAL,0}, {S_ILLEGAL,0}, | |
605 {S_CPX, zp}, {S_SBC, zp}, {S_INC, zp}, {S_SMB6, zp}, | |
606 {S_INX, impl}, {S_SBC, imm}, {S_NOP, impl}, {S_ILLEGAL,0}, | |
607 {S_CPX, abso}, {S_SBC, abso}, {S_INC, abso}, {S_BBS6,zrel}, | |
608 {S_BEQ, rel}, {S_SBC, indy}, {S_SBC, ind}, {S_ILLEGAL,0}, | |
609 {S_ILLEGAL,0}, {S_SBC, zpx}, {S_INC, zpx}, {S_SMB7, zp}, | |
610 {S_SED, impl}, {S_SBC, absy}, {S_PLX, impl}, {S_ILLEGAL,0}, | |
611 {S_ILLEGAL,0}, {S_SBC, absx}, {S_INC, absx}, {S_BBS7,zrel}, | |
612 }; | |
613 #endif /* _MAIN_C_ */ | |
614 | |
615 #endif /* _OPCODES_H_ */ |